The standard port adresses are given below. Most PCs have them. If you are using IBM PS/2, equipped with a micro-channel bus, different addresses and interrupt requests can be expected. Just like LPT ports, base adresses for ���-ports can be obtained from the data range in BIOS.

Name

Address

IRQ

COM 1

3F8

4

COM 2

2F8

3

COM 3

3E8

4

COM 4

2E8

3

Standard Port Addresses

The table below contains the address having the addresses for COM-ports in BIOS data range. Each address has two bytes.

Start Address

Function

0000:0400

COM1's Base Address

0000:0402

COM2's Base Address

0000:0404

COM3's Base Address

0000:0406

COM4's Base Address

COM Port Addresses in the BIOS Data Area

3F8 offset 總覽

Table of Registers

Base Address

DLAB

Read/Write

Abr.

Register Name

+ 0

=0

Write

-

Transmitter Holding Buffer

=0

Read

-

Receiver Buffer

=1

Read/Write

-

Divisor Latch Low Byte

+ 1

=0

Read/Write

IER

Interrupt Enable Register

=1

Read/Write

-

Divisor Latch High Byte

+ 2

-

Read

IIR

Interrupt Identification Register

-

Write

FCR

FIFO Control Register

+ 3

-

Read/Write

LCR

Line Control Register

+ 4

-

Read/Write

MCR

Modem Control Register

+ 5

-

Read

LSR

Line Status Register

+ 6

-

Read

MSR

Modem Status Register

+ 7

-

Read/Write

-

Scratch Register

 

 

3F8

 

Below is the table with some standard rates and their divisor latch high bytes & low bytes.

Speed (BPS)

Divisor (Dec)

Divisor Latch High Byte

Divisor Latch Low Byte

50

2304

09h

00h

300

384

01h

80h

600

192

00h

C0h

2400

48

00h

30h

4800

24

00h

18h

9600

12

00h

0Ch

19200

6

00h

06h

38400

3

00h

03h

57600

2

00h

02h

115200

1

00h

01h

Table of Commonly Used Baudrate Divisors

 

 

3F9

Bit

Notes

Bit 7

Reserved

Bit 6

Reserved

Bit 5

Enables Low Power Mode (16750)

Bit 4

Enables Sleep Mode (16750)

Bit 3

Enable Modem Status Interrupt

Bit 2

Enable Receiver Line Status Interrupt

Bit 1

Enable Transmitter Holding Register Empty Interrupt

Bit 0

Enable Received Data Available Interrupt

Interrupt Enable Register

 

 

 

 

 

 

http://www.cs.ucv.ro/staff/dtusaliu/DC/uart.html

 

http://www.lookrs232.com/rs232/addresses.htm

 

http://www.eng.usf.edu/~gilbert/courses/modelandanalysis/notes/serialtransmit/8250/8250manuals/baudrate.pdf

 

http://www.quicklogic.com/assets/pdf/data_sheets/QL_UART_PSB_DS_RevC.pdf

 

http://retired.beyondlogic.org/serial/serial.htm#8

 

 

 

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